Del Rio R. CMOS Cascade Sigma-Delta Modulators...Design 2006

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Del Rio R. CMOS Cascade Sigma-Delta Modulators...Design<span style=color:#777> 2006</span>Del Rio R. CMOS Cascade Sigma-Delta Modulators...Design<span style=color:#777> 2006</span>

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Del Rio R. CMOS Cascade Sigma-Delta Modulators...Design 2006.torrent
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Textbook in PDF format

The contents of the book are organized in five chapters. Chapter 1 presents an introduction to SD A-to-D converters, showing the principles of operation, the basic architectures, and the ideal performance of SD modulators. Topologies for their practical implementation are introduced and their pros and cons are discussed. The state of the art in low-pass SD modulators in CMOS technologies is then revised, showing existing trends in present designs. Chapter 2 is dedicated to the exhaustive analysis of the main non-idealities that affect the performance of SD modulators. System considerations, behavioral models, and closed expressions are obtained for the impact of the different non-idealities, which can be used as estimable guidelines for practical implementation of SD modulators. Chapters 3 and 4 describe the design of the two SD modulators intended for broadband applications, whereas Chapter 5 describes the design of the SD modulator with programmable gain for automotive sensor interfaces. The topology selection, the requirements of the building blocks, and their design at the transistor level are deeply discussed. The measured performance for the prototypes is presented and compared with the state-of-the-art SD modulators. The considerations presented through the book for the design of cascade SD modulators in deep-submicron CMOS are extended in Appendixes A and B. Appendix A proposes a family of cascade SD modulators that is easily expandible to high order, while preserving a low systematic loss of resolution and a high overload level. An analytical method to estimate its power consumption is presented in Appendix B

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